1. Field of the Invention
The present invention relates to a flip chip mounting method, and more particularly to a method of manufacturing a flip chip prior to being mounted.
2. Description of the Background Art
With a flip chip mounting method for bonding a semiconductor chip and an assembly substrate with solder bumps interposed therebetween, stress concentrates on the solder bumps with thermal change and impact occurring after bonding, causing the solder bumps to be stripped from the semiconductor chip or assembly substrate.
Thus, a method has been employed by which an underfill resin is filled between a semiconductor chip and an assembly substrate in order to ease concentration of stress on solder bumps and to promote adhesion between the semiconductor chip and assembly substrate (e.g., Japanese Patent Application Laid-Open No. 2002-203866; FIG. 1).
For flip chip mounting, a pad covered with a passivation film needs to be exposed from the passivation film in order to form solder bumps on the side of a semiconductor chip.
As a method of exposing a pad, a method has been employed by which a polyimide film having an opening above the pad is formed on a passivation film, and an etching process is carried out using the polyimide film as a mask to form an opening in the passivation film so as to reach the pad, thereby exposing the pad from the bottom of the opening.
With this method, however, a reaction product generated in the etching process carried out on the passivation film adheres to the surface of the polyimide film, causing a cured layer to be formed on the polyimide film.
In the case where the semiconductor chip and assembly substrate are bonded by flip chip mounting using an underfill resin with the cured layer formed on the polyimide film, adhesion between the underfill resin and cured layer is poor, which problematically causes the assembly substrate and semiconductor chip to be stripped from each other during device operation.
Poor adhesion between the assembly substrate and semiconductor chip had not been in question with semiconductor chips having smaller area, but has become perceived as a problem with a recent trend toward larger area of semiconductor chips. This is because stresses have become increased with increase in area of semiconductor chips to such a degree that frequent splitting of the assembly substrate and semiconductor chip from each other due to poor adhesion therebetween cannot be neglected.